This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 11-078145, filed Mar. 23, 1999, the entire contents of which are incorporated herein by reference.
The present invention relates to a semiconductor device having a wiring structure prepared by filling a concave portion such as a connection hole, a wiring groove, or a combination of a connection hole and a wiring groove connected to the connection hole with a conductive film, and a method of manufacturing the same.
An Al wiring is widely used in a semiconductor device. Recently, an Al wiring made of an Al-based alloy is widely used in a semiconductor device. As a multi-layer wiring, used is an Al wiring of a laminate structure (hereinafter referred to as xe2x80x9cAl-RIE wiring) consisting of a barrier metal lower layer consisting of, for example, a TiN film and serving to suppress the reaction with the wiring and an upper layer consisting of an Al film and acting as a reflection preventing film for suppressing the irregular reflection of light in the lithography process and prepared by applying RIE to the laminate structure.
However, the Al-RIE wiring is defective in that the presence of the barrier metal film and the reflection preventing film causes a substantial cross sectional area of the Al-RIE wiring contributing to the electrical connection to be diminished so as to increase the wiring resistance. Also, the RIE reaction product is deposited on the wiring side wall in the RIE step so as to decrease the substantial Al cross sectional area and, thus, to increase the wiring resistance.
It was customary in the past to use a W-CVD technology for forming a W film by CVD excellent in the step coverage properties as a technology for forming a plug electrode connected to the Al-RIE wiring. However, the W plug electrode is defective in that the electrode exhibits a high resistance and is poor in resistance to EM (electromigration).
EM is the phenomenon that, during flow of current through the Al wiring, electrons collide against the Al atom so as to move the Al atom. W is unlikely to bring about EM, compared with Al. Therefore, if a W plug is used for connecting the upper and lower Al wirings, the W plug electrode provides a diffusion barrier of Al atoms, with the result that Al atoms are accumulated on the upstream side of the Al atom stream and Al depletion takes place on the downstream side. The accumulation and depletion of Al cause hillock and void, respectively. The progress of hillock causes short-circuiting of the Al wirings. Also, the progress of void causes breakage of the Al wiring.
On the other hand, an Al reflow technology is known to the art as a technology for forming within a connection hole an Al plug electrode having a resistance lower than that of the W plug electrode. In the Al reflow technology, which utilizes the fluidizing properties of the Al film, an Al film is filled in the connection hole by heating a semiconductor substrate.
Further, a 2-step Al reflow technology, in which an Al film is formed by a sputtering method under no heating, followed by forming another Al film by a sputtering method while heating a semiconductor substrate, is known to the art as an Al reflow technology that permits lowering the fluidizing temperature of Al and is expected to fill a connection hole having a high aspect ratio.
Application of the Al reflow technology to formation of a dual damascene structure (DD structure) is now under study. For forming a DD structure by utilizing the Al reflow technology, a connection hole and a wiring groove, which are hereinafter collectively referred to as xe2x80x9cconcave portionxe2x80x9d, are formed in an interlayer insulating film, followed by forming an Al film by a sputtering method to fill the concave portion and subsequently removing the excess Al film positioned outside the concave portion by CMP (Chemical Mechanical Polishing). The particular technology is advantageous in that the number of process steps can be decreased and the manufacturing cost can be reduced.
The Al reflow technology in which an Al film is formed by a sputtering method is originally low in the step coverage properties of the Al film. As a result, the Al film is formed thin in the bottom portion of the connection hole, and the Al agglomeration takes place in the heating step of the semiconductor substrate so as to generate voids within the connection hole.
For overcoming the above-noted problem, it is proposed to form a liner film made of a material capable of suppressing the Al agglomeration on the inner surface of the concave portion prior to the Al film formation. A Ti film having a high reactivity with the Al film is widely used as a liner film.
However, if the aspect ratio of the connection hole is high, the Ti liner film fails to cover sufficiently the side wall in the bottom portion of the connection hole, giving rise to agglomeration of Al in the bottom portion of the connection hole. If Al agglomeration takes place, the diffusion route of Al is made discontinuous, giving rise to the problem that it is impossible to fill the connection hole with the Al film.
It should also be noted that an Al3Ti film, which is formed as a result of reaction with Al, is formed within the concave portion. Particularly, the Al3Ti film formed at the bottom portion of the connection hole acts as a diffusion barrier of Al like the W plug, leading to deterioration in the resistance to EM.
Further, if an Al3Ti film is formed on the inner surface of the wiring groove, the volume of the Al film within the wiring groove is decreased, leading to an increased wiring resistance.
As described above, application of the Al reflow technology to formation of a DD structure is now under study, and it is proposed to use a Ti liner film having a high reactivity with the Al film as a underlying film.
However, if the aspect ratio of the connection hole is high, the Ti liner film fails to cover sufficiently the side wall in the bottom portion of the connection hole, giving rise to Al agglomeration in the bottom portion of the connection hole. As a result, the Al film fails to fill the connection hole. Also, an Al3Ti film formed within the concave portion causes deterioration in the resistance to EM so as to increase the wiring resistance.
An object of the present invention is to provide a semiconductor device comprising a wiring structure that permits filling a concave portion with a wiring layer even if the concave portion has a high aspect ratio.
Another object is to provide a method of manufacturing a semiconductor device comprising a wiring structure that permits filling a concave portion with a wiring layer even if the concave portion has a high aspect ratio.
According to a first aspect of the present invention, there is provided a semiconductor device, comprising a semiconductor substrate, an interlayer insulating film formed on one main surface of the semiconductor substrate and having a concave portion, a liner film formed on the inner surface of the concave portion, a wiring layer formed inside the concave portion with the liner film interposed therebetween, and an agglomeration suppressing material contained in the wiring layer for suppressing agglomeration of the material constituting the wiring layer.
According to a second aspect of the present invention, there is provided a semiconductor device, comprising a semiconductor substrate, an interlayer insulating film formed on one main surface of the semiconductor substrate and having a concave portion, a liner film formed on the inner surface of the concave portion, a wiring layer formed inside the concave portion with the liner film interposed therebetween, an agglomeration suppressing material contained in the wiring layer for suppressing agglomeration of the material constituting the wiring layer, and a layer of reaction product between the material constituting the liner film and the material constituting the wiring layer, the reaction product layer being formed at any one of the interface between the liner film and the wiring layer and the interface between the interlayer insulating film and the wiring layer.
According to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of forming an interlayer insulating film having a concave portion on a semiconductor substrate, forming a liner film on the inner surface of the concave portion, forming a first conductive film within the concave portion, the first conductive film containing an agglomeration suppressing material for suppressing agglomeration of the first conductive film, and forming a second conductive film within the concave portion while heating the semiconductor substrate and permitting reflow of the first and second conductive films to fill the concave portion with these conductive films.
Further, according to a fourth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of forming an interlayer insulating film having a concave portion on a semiconductor substrate, forming a liner film on the inner surface of the concave portion, forming a first conductive film that does not contain impurities within the concave portion, and forming a second conductive film containing impurities within the concave portion while heating the semiconductor substrate and permitting reflow of the first and second conductive films to fill the concave portion with the conductive films.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.